일반기술

2-D and 3-D combined rasterizer circuit for graphics accelerator

The invention is about improved rasterizing part which decides pixels to be displayed on screen for 2-d and 3-D graphics rendering circuit structure level. Traditional system can avoid either 2-D or 3-D acceleration because it only focuses on one type. Also, for 2-D graphics drawing, the function to reduce antialiasing effect in pixel is not implemented properly. The invention introduces 2-D and 3-D combined rasterizer in consideration of antialiasing. This combined rasterizer will optimize the 2-D and 3-D polygon drawing and reduce implementation cost because it shares resources.

기술정보

기술분류
전기·전자 > 반도체 공정 (B63)
보유기관
한국과학기술원
기술유형
일반기술
등록일
2000-04-29
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